Plasma display devices employing plasma display panels (PDPs) are drawing increasing attention as display devices for high-definition television images on large screens.
A PDP is basically composed of front and rear boards. The front board includes a glass substrate, display electrodes including transport electrodes and bus electrodes aligned in stripes on one main face of the glass substrate, a dielectric layer covering the display electrodes that functions as a capacitor, and a dielectric protective film formed on the dielectric layer. The rear board includes a glass substrate, address electrodes aligned in stripes on one main face, a dielectric layer covering the address electrodes, barrier ribs formed on the dielectric layer, and a phosphor layer which emits red, green, and blue lights formed between barrier ribs.
The electrodes on the front and rear boards face each other, and their peripheries are hermetically sealed. Discharge gas such as neon (Ne)—xenon (Xe) is injected into the discharge space created by the barrier ribs at pressures of 400˜600 torr. The discharge gas is discharged by selectively applying video signal voltages to the display electrodes. Ultraviolet rays emitted by the discharge gas excite the different color phosphor layers. Red, green, and blue light is thus emitted to display color images.
A wiring lead-out of display electrodes on the front board and address electrodes on the rear board are provided on respective boards in the same plane, and a flexible printed circuit board (FPC) is press-bonded on the lead-out via an anisotropic conductive member to connect to external wiring. One example of a PDP in which these electrodes have a multilayer structure on each board by interposing an insulating layer with a predetermined thickness is disclosed in Japanese Laid-open Patent No. 2001-210243. In this example, the electrode wiring layer on the front board has scanning electrodes and sustainS electrodes as the first electrode layer, and trigger electrodes separated by the dielectric layer as the second electrode layer.
In this method of press-bonding the FPC onto the wiring lead-out via the anisotropic conductive member for coupling the wiring lead-out to the external wiring, the wiring lead-out is provided on the four sides which are the periphery of the PDP, and the electrodes are disposed in such a way that the potential applied to the wiring lead-out on each side is uniform. Accordingly, the wiring lead-out on each side is provided in the same plane to avoid coupling failure between the wiring lead-out and the FPC while press-bonding the FPC onto each side. If electrodes are given a multilayer structure by interposing the insulating layer, in addition to providing wiring lead-outs in such a way that the potential applied to each side is uniform, the electrode wiring in the second layer is disposed in such a way as to cross a step of the insulating layer at the wiring lead-out. This makes the thickness of electrode wiring on the second layer thinner at the step, resulting in increasing the wiring resistance or causing disconnection.
The present invention aims to offer a highly reliable PDP by stabilizing the characteristics of the electrode wiring at the wiring lead-out even if the electrodes formed on the boards have a multilayer structure and their applied potential differs.